Example projects
Real engineering problems in storage, networking, vision, acceleration, embedded systems and space, each starting from a simple prompt and ending in a device-locked bitfile you can test in the Remote FPGA Lab.
Conceptual illustration
Copy a prompt, or open a project to see the problem, architecture, IP and validation steps. Compatibility and availability are confirmed for each selected configuration.
UC 01
A RISC-V system that samples sensors, logs to NVMe and streams over 1G Ethernet.
Build an FPGA-based smart data logger using a RISC-V processor integrated with SPI, I²C, GPIO, timer, AXI interconnect, DMA, DDR memory controller, 1Gb Ethernet MAC and PCIe/NVMe host IPs.
UC 02
Earth-observation imagery compressed, stored reliably and queued for downlink by priority.
Design an FPGA-based satellite payload recorder that receives Earth-observation imagery, compresses it, stores it reliably and prepares prioritized data for downlink.
UC 03
Filtering, timestamping and flow-consistent distribution to host queues.
Build a packet-capture accelerator for my network-monitoring appliance. Filter traffic by IP address, port and VLAN, timestamp selected packets and distribute each flow consistently across host receive queues. Report capture rate, queue occupancy and packet drops.
UC 04
Synchronised capture, ROI cropping, DDR4 buffering and PCIe transfer.
Build a dual-camera acquisition pipeline for a factory inspection system. Synchronise frame capture, crop each image to a configurable inspection region, buffer frames in DDR4 and transfer them to the host over PCIe. Report dropped frames and timestamp alignment.
UC 05
Your AXI-Stream module, wrapped in PCIe, DMA, DDR4 and control registers.
Integrate my AXI-Stream processing module into a PCIe accelerator. Move input data from host memory through the module and return the results, using DDR4 for buffering. Add control registers and measure end-to-end throughput and latency.
UC 06
Camera in, H.265 encode, stream over Ethernet or record to NVMe.
Build an FPGA video pipeline for industrial inspection. Receive camera video, buffer frames in DDR memory, encode using H.265 and stream over Ethernet or record to an NVMe SSD. Support configurable resolution and bitrate, and report frame rate, dropped frames and pipeline latency.
UC 07
Ethernet ingest, DDR4 burst buffering and continuous NVMe recording.
Build an FPGA data recorder for my industrial test system. Receive timestamped sensor data over Ethernet, buffer traffic bursts in DDR4 and continuously record to an NVMe SSD. Detect missing samples and report sustained recording speed and buffer overruns.
UC 08
A DDR4-backed NVMe target with controlled delays and error injection.
Build an NVMe device emulator to test my storage software. Present a configurable DDR4-backed namespace, introduce controlled command delays and selected error responses, and log how the host handles timeouts and recovery.
UC 09
Routes and filters CAN FD, CAN, LIN and Ethernet traffic, with UDS diagnostics over DoIP.
Build an FPGA-based automotive gateway using an automotive-grade RISC-V processor that routes and filters messages between CAN FD, CAN and LIN buses and automotive Ethernet, and supports vehicle diagnostics over UDS and DoIP.