Conceptual render: a central FPGA surrounded by board interfaces and copper signal paths.

Pay as you go · Planned launch pricing

From your first FPGA build to your next product.

No subscription. Buy credits, spend them on prompts and builds, and pay by the hour to test on a real board.

Conceptual illustration

1

Buy credits

Pay once, no monthly fee. Credits belong to one user. Bigger tiers include up to 30% bonus credits.

BronzeNo bonus
$149
149 credits

A first small project · standard queue

Buy Bronze
Recommended for Prototyping
Silver+50 bonus · 10%
$499
549 credits

A PCIe or DDR project · priority queue

Buy Silver →
Gold+200 bonus · 20%
$999
1,199 credits

Several projects or premium IPs · priority queue

Buy Gold
Platinum+600 bonus · 30%
$1,999
2,599 credits

Heavy use and premium IPs · highest priority

Buy Platinum

Enterprise · Volume credits, dedicated boards and contract terms.

Contact Sales

USD, taxes extra. Credits are per user and cannot be shared or transferred between users. They expire 12 months after purchase, and the earliest-expiring credits are used first. Payments are not live yet: buttons request early access and nothing is charged.

2

Spend credits on prompts, builds, firmware and lab time

Every prompt iteration uses credits. The more you iterate and the more IPs involved, the more it uses. RISC-V designs also use credits for the firmware SIGPT generates.

Prompt credits · per iteration
2base, covers typical tokens
1 × IPsfor each IP in the architecture
Per iterationshown before you send

Very long prompts are billed by actual tokens at 1 credit per 10,000 tokens above the typical allowance. A live counter shows credits used.

Example · 4-IP architecture

1 iteration = 6 credits · 5 iterations = 30 credits

Every build costs
IP creditsall IPs in the design
Build feeby FPGA size
FirmwareRISC-V designs only
Quoteapprove before it runs
Example PCIe Gen4 250DDR4 150PCIe DMA 80Medium fee 25 = 505 credits
Firmware credits · RISC-V designs

If your prompt includes a RISC-V, SIGPT generates matching firmware. Credits depend on how complex it is and how much code it needs. The estimate appears in your quote before anything runs.

ComplexityTypically includesUp toCredits
BasicBoot code, board support, 1–3 drivers2k lines20
StandardDrivers for every IP and a bare-metal application8k lines60
AdvancedRTOS, networking or storage stacks, several tasks20k lines150
ComplexFault-tolerant or safety patterns, FDIR, many tasks40k lines300

Above a tier's allowance, each extra 1,000 lines costs 8 credits. Regenerating firmware after a prompt change is charged again at its tier, so finish refining the prompt first.

Credits grow with code

RISC-V data logger · 7 drivers + logging app ≈ Standard · 60 credits

IP credits · by complexity
5–20UART, SPI, GPIO
21–601G Ethernet, USB 2
61–150DDR4, PCIe Gen3
151–300PCIe Gen4, DDR5
301–500PCIe Gen6, CXL, HBM
All 140+ IP prices →
By FPGA size
Build feeRemote lab
Small10 credits$5/hr
Medium25 credits$10/hr
Large50 credits$20/hr
Lab billed by the minute (10-min minimum), from credits or card. No charge while queued. Remote FPGA Lab →
Good to know
  • Builds are locked. Once complete, a build can’t be changed.
  • Copy to change. A copy is a new build and pays its IPs and fee again.
  • Failed build? If no bitfile passes the build checks, credits are returned.
  • Never over quote. Usage can’t exceed what you approved.
  • Refine before re-running. Each new architecture iteration uses credits, so batch your changes.
  • Firmware is quoted too. RISC-V designs show firmware credits in the quote. Regenerating it costs credits again.
  • Credits are personal. Each user buys their own. No sharing between users.
3

Estimate a project

Pick your IPs and board. Adding a RISC-V turns on firmware. We’ll suggest the cheapest pack.

IPs in your design
    Credits needed0
    Prompt iterations
    0
    IP credits
    0
    Build fees
    0
    RISC-V firmware
    0
    Remote lab
    0
    Cheapest way to buy$0

    Estimate only. Your exact quote appears before each build.

    4

    What you get

    Credits cover prototyping. Production is licensed separately.

    Included with every successful build
    • FPGA bitfile for your target
    • Matching firmware image, for RISC-V designs
    • Build, timing and resource reports
    • Remote lab test logs
    • Internal evaluation and prototyping rights
    Quoted separately
    • Commercial and production deployment
    • RTL and firmware source, encrypted or plain
    • ASIC and tape-out rights
    • Custom engineering and board porting
    Discuss Production Licensing →
    All 140+ IP pricesSearch by name or family
    Credits per IP
    IPFamilyCredits

    5

    Quick answers

    Can my team share credits?
    No. Credits are per user in every tier and can’t be shared or transferred. Each team member buys their own pack. For team volumes, contact sales.
    Is there a monthly fee?
    No. Buy a pack when you need one. Nothing renews automatically.
    Do prompts cost credits?
    Yes. Each prompt iteration uses 2 credits plus 1 credit per IP in the architecture, and very long prompts are billed by tokens. Repeated experimenting uses more credits, so a counter shows your usage as you go.
    Does firmware cost credits?
    Only for designs with a RISC-V processor. Firmware credits depend on complexity and code length: from 20 credits for boot code and a few drivers, up to 300 for a fault-tolerant, multi-task application. Above a tier's allowance, each extra 1,000 lines costs 8 credits. The amount appears in your quote first, and regenerating firmware is charged again.
    How long do credits last?
    12 months from purchase. Unused credits are not refunded after expiry.
    Can I change a finished build?
    No, builds are locked. Copy it, update it and approve a new quote, which includes all IPs and the build fee again.
    Does a passing build mean it’s fully validated?
    No. Build checks don’t prove full functional correctness or production readiness. Lab tests cover what the chosen setup supports.
    Can I use every IP on every board?
    No. SIGPT draws on 140+ 3rd-party FPGA-proven IPs, but availability depends on your FPGA, board and workflow.
    Can I sell products or get the RTL?
    Not with credits alone. Production rights and source code need a separate agreement. See licensing.
    Are vendor tools included?
    Managed builds run in SIGPT’s environment. Working locally may need separately licensed vendor tools.

    Teaching a class or running a lab? Ask about institutional pricing.

    Know the cost. Then build.