Custom PCIe Accelerator
Your AXI-Stream module behind PCIe and DMA, with DDR4 buffering and throughput metrics.
AI FPGA design · Early access open
Your prompt.
A working FPGA.
Describe the hardware you need in plain language. SIGPT selects and integrates proven IP, runs synthesis, implementation and timing, and hands you a device-locked bitfile you can test on real AMD boards.
- 140+ 3rd-party FPGA-proven IPs, from RISC-V and PCIe to NVMe, DDR4 and Ethernet, plus your own, encrypted
- Real AMD boards in the Remote FPGA Lab, 24/7 from $5/hr. No hardware on your desk.
- Matching RISC-V firmware generated from the same spec when your design has a processor
- License for production, buy the source, or continue toward an ASIC
Prefer email? Write to info@sigpt.ai
Free · early access
Get a free feasibility review
Tell us what you want to build. Within 1 business day, an engineer replies with a device, IP and configuration fit check. Then we quote your build and set up Remote Lab time.
Conceptual illustration
Builds for AMD FPGAs
- Zybo Z7-20Zynq-7000
- ZCU106Zynq UltraScale+
- KCU116Kintex UltraScale+
- Custom boardson request
What is SIGPT?
An AI platform that turns a prompt into tested FPGA hardware.
SIGPT is an AI-powered FPGA design platform. You describe the hardware you need. SIGPT breaks the prompt into functional blocks, selects matching IP from 140+ 3rd-party FPGA-proven IPs, generates the glue logic and runs synthesis, implementation and timing to produce a device-locked bitfile for your AMD FPGA.
You then run that bitfile on a real board in the SIGPT Remote FPGA Lab. When it passes your tests, license it for production, buy the full source or continue toward an ASIC.
140+FPGA-proven IPs in nine families
$5/hrRemote Lab boards, available 24/7
1Spec for RTL and RISC-V firmware
0Subscription fees. Pay as you go.
How it worksFour steps
From prompt to proven hardware in four steps.
Every stage is visible, and every build is quoted before it runs.
Describe it
Write what the design must do in plain language: interfaces, throughput, storage, target board.
SIGPT assembles the IP
Matching IP is selected and wired together with generated interconnect, clocks and registers.
Build the bitfile
Synthesis, implementation and timing run for your FPGA. You get a device-locked bitfile and reports.
Test, then decide
Run it on a real board in the Remote FPGA Lab. Then license it, buy the source or take the ASIC path.
Have proven logic already? Upload it encrypted and SIGPT connects it as a sealed block.
Get my free review →Example projectsStart from a prompt
Start from a proven prompt. Make it yours.
Pick an example close to your project. We drop the prompt into the form so you can edit it.
NVMe Device Emulator
A DDR4-backed namespace with controlled delays and error injection to test storage software.
RISC-V Smart Data Logger
RISC-V with SPI, I²C, DMA, DDR, 1G Ethernet and NVMe storage, firmware included.
Video Encoder & Recorder
Camera video buffered in DDR, H.265-encoded, streamed over Ethernet or recorded to NVMe.
Packet-Capture Accelerator
Filter by IP, port and VLAN, timestamp packets and spread flows across host queues.
Industrial Data Recorder
Timestamped Ethernet sensor data buffered in DDR4 and recorded continuously to NVMe.
CompareSIGPT vs a typical flow
How SIGPT compares with a typical FPGA flow.
The same engineering stages, with the integration, build and test setup handled for you.
| Stage | Typical FPGA development | With SIGPT |
|---|---|---|
| Starting point | Architecture spec, then hand-written RTL and IP configuration | A plain-language prompt describing what the design must do |
| IP integration | Source, configure and wire each IP core by hand | Selected from 140+ FPGA-proven IPs and wired with generated glue logic |
| Build | Run and debug synthesis, implementation and timing yourself | Synthesis, implementation and timing run for you, with reports |
| Firmware | Written separately, kept in sync with the memory map by hand | RISC-V firmware generated from the same spec and memory map |
| Test hardware | Buy and maintain development boards | Real AMD boards in the Remote FPGA Lab, 24/7 from $5/hr |
| Path to product | Separate licensing and porting work | Production licence, full source or ASIC Readiness |
PricingPlanned launch pricing
Pay as you go. No subscription.
Buy credits once, spend them on prompts and builds, and pay by the hour for lab boards. 1 credit = $1.
Credit packs$149 to $1,999
Per user. Larger packs include up to 30% bonus credits. Credits last 12 months.
BuildsQuoted first
IP credits plus a build fee by FPGA size. You approve the quote before anything runs.
Remote FPGA LabFrom $5/hr
$5/hr for small boards such as the Zybo Z7-20, $10/hr for the ZCU106 and KCU116.
Payments are not live yet. Early access requests are free and nothing is charged.
Full pricing and estimator →Your IPStays yours
Bring proven logic. It stays sealed.
01 · Private vaultEncrypted and isolated
Only your organisation can access it, with named users and multi-factor sign-in.
02 · Never for trainingYour IP is not training data
Uploads are never used to train models.
03 · Sealed blockInterface only
SIGPT reads ports, clocks and resets, never the internals.
04 · Standard busesAXI4, AHB or APB
Glue logic is generated around your block, then tested in the lab.
Questions, answered.
What is SIGPT?
SIGPT is an AI-powered FPGA design platform. You describe the hardware you need in plain language. SIGPT breaks the prompt into functional blocks, selects and integrates matching IP from a catalogue of 140+ 3rd-party FPGA-proven IPs, generates the glue logic, and runs synthesis, implementation and timing to produce a device-locked bitfile for your AMD FPGA.
Which FPGAs and boards does SIGPT support?
SIGPT targets AMD (Xilinx) FPGAs: lab boards such as the Zybo Z7-20, ZCU106 and KCU116, commercial AMD boards, and custom boards. Compatibility is confirmed for each device, IP and configuration before a build runs. Platforms →
Do I need my own FPGA hardware?
No. You can test your bitfile on real AMD boards in the SIGPT Remote FPGA Lab, available 24/7 and billed by the hour: $5/hr for small boards such as the Zybo Z7-20 and $10/hr for medium boards such as the ZCU106 and KCU116. Remote FPGA Lab →
How much does SIGPT cost?
SIGPT is pay as you go with credits, with no subscription. Planned launch credit packs are $149, $499, $999 and $1,999 per user, where 1 credit is $1. Prompt iterations, IP, build fees and firmware use credits, and every build is quoted before it runs. Payments are not live yet, so early access requests are free.
Can I use my own IP, and is it used for training?
Yes. You upload proven IP, encrypted, to a private vault that only your organisation can access. SIGPT treats it as a sealed block, reads only its interfaces, and connects it over AXI4, AXI4-Lite, AXI4-Stream, AHB or APB. Your IP is never used for training.
Do I get the source code?
Every project includes a device-locked evaluation bitfile for testing. After testing you can buy a production licence to ship the bitfile on registered devices, or buy the full project source, including integration logic, constraints, build scripts and generated firmware source. Licensing →
Can an FPGA prototype from SIGPT become an ASIC?
Yes. ASIC Readiness takes a validated FPGA design and prepares it for ASIC implementation: it identifies FPGA-specific dependencies, prepares portable RTL, extends verification and prepares constraints and design collateral. It is preparation for an ASIC design package, not tapeout. ASIC Readiness →
Is SIGPT available now?
SIGPT is in early access. Share your prompt and target platform, and the team reviews your requirements, confirms device, IP and configuration compatibility, and schedules Remote FPGA Lab time so you can test on real boards.
What will you build? Tell us in a sentence.
Free feasibility review from a SIGPT engineer. No payment, no hardware needed.